HIGH
VOLTAGE MODULE CONTROL LOGIC
L.
P. Dimitrov, B. B. Kunov
Institute
for Nuclear Research and Nuclear Energy
Sofia,
Bulgaria
ludim@inrne.bas.bg
Instruction code |
ALL |
Clk's Nbr |
Rd/ Wr |
Data |
Description |
A7 6 5
4 3 2 1 0 |
|||||
1 1 0 x x x x x |
x |
1 |
Wr |
|
Enable module and load ID |
1 1 1 x x x x x |
x |
1 |
Wr |
|
Disable module and load ID |
0 1 1 0
c c c c |
x |
1 |
Wr |
|
Clear Prot. Rg(s)
- channel cccc |
0 1 1 1 x x x x |
x |
1 |
Wr |
|
Clear Prot. Rg(s)
- all channels |
0 1 0 0 c c c c |
x |
1 |
Wr |
|
Set Prot. Rg(s)
- channel cccc |
0 1 0
1 x x x x |
x |
1 |
Wr |
|
Set Prot. Rg(s)
- all channels |
0 0 0 1
x x x x |
x |
16 |
Wr |
In
|
Load all DAC’s
shift registers |
0 0 1
0 c c c c |
x |
1 |
Wr |
|
Load
DAC’s output rg - ch. cccc |
0 0 1 1 x x x x |
x |
1 |
Wr |
|
Load
all DAC’s output registers |
1 0 x
0 c c c c |
1 |
15 |
Rd |
|
ADC conversion - ch.
cccc (voltage) |
1 0 x
1 c c c c |
1 |
15 |
Rd |
|
ADC conversion - ch.
cccc (current) |
1 0
x x x x x x |
0 |
14 |
Rd |
Out
|
Read module data register |
x
- don't care